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sn54ahc74, sn74ahc74 dual positive-edge-triggered d-type flip-flops with clear and preset scls255j ? december 1995 ? revised july 2003 1 post office box 655303 ? dallas, texas 75265 operating range 2-v to 5.5-v v cc latch-up performance exceeds 250 ma per jesd 17 esd protection exceeds jesd 22 ? 2000-v human-body model (a114-a) ? 200-v machine model (a115-a) ? 1000-v charged-device model (c101) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1clr 1d 1clk 1pre 1q 1q gnd v cc 2clr 2d 2clk 2pre 2q 2q sn54ahc74 ...j or w p ackage sn74ahc74 . . . d, db, dgv, n, ns, or pw package (top view) 3212019 910111213 4 5 6 7 8 18 17 16 15 14 2d nc 2clk nc 2pre 1clk nc 1pre nc 1q 1d 1clr nc 2q 2q v 2clr 1q gnd nc sn54ahc74 . . . fk package (top view) cc nc ? no internal connection sn74ahc74 . . . rgy package (top view) 114 78 2 3 4 5 6 13 12 11 10 9 2clr 2d 2clk 2pre 2q 1d 1clk 1pre 1q 1q 1clr 2q v gnd cc description/ordering information the ?ahc74 dual positive-edge-triggered devices are d-type flip-flops. a low level at the preset (pre ) or clear (clr ) inputs sets or resets the outputs, regardless of the levels of the other inputs. when pre and clr are inactive (high), data at the data (d) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. following the hold-time interval, data at the d input can be changed without affecting the levels at the outputs. ordering information t a package ? orderable part number top-side marking qfn ? rgy tape and reel sn74ahc74rgyr ha74 pdip ? n tube sn74ahc74n sn74ahc74n soic ? d tube sn74ahc74d ahc74 soic ? d tape and reel sn74ahc74dr ahc74 ?40 c to 85 c sop ? ns tape and reel sn74ahc74nsr ahc74 ssop ? db tape and reel sn74ahc74dbr ha74 tssop pw tube sn74ahc74pw ha74 tssop ? pw tape and reel sn74ahc74pwr ha74 tvsop ? dgv tape and reel sn74ahc74dgvr ha74 cdip ? j tube snj54ahc74j snj54ahc74j ?55 c to 125 c cfp ? w tube snj54ahc74w snj54ahc74w lccc ? fk tube snj54ahc74fk snj54ahc74fk ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. copyright ? 2003, texas instruments incorporated please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. on products compliant to mil-prf-38535, all parameters are tested unless otherwise noted. on all other products, production processing does not necessarily include testing of all parameters.
sn54ahc74, sn74ahc74 dual positive-edge-triggered d-type flip-flops with clear and preset scls255j ? december 1995 ? revised july 2003 2 post office box 655303 ? dallas, texas 75265 function table (each flip-flop) inputs outputs pre clr clk d q q l h x x h l h lxxl h l lxxh ? h ? h h hh l h h ll h h h l x q 0 q 0 ? this configuration is nonstable; that is, it does not persist when pre or clr returns to its inactive (high) level. logic diagram, each flip-flop (positive logic) tg c c tg c c tg c c c tg c c pre clk d clr q q c
sn54ahc74, sn74ahc74 dual positive-edge-triggered d-type flip-flops with clear and preset scls255j ? december 1995 ? revised july 2003 3 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage range, v o (see note 1) ? 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) ? 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 2): d package 86 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 2): db package 96 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 2): dgv package 127 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 2): n package 80 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 2): ns package 76 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 2): pw package 113 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 3): rgy package 47 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ? 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ? recommended operating conditions ? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. the package thermal impedance is calculated in accordance with jesd 51-7. 3. the package thermal impedance is calculated in accordance with jesd 51-5. recommended operating conditions (see note 4) sn54ahc74 sn74ahc74 unit min max min max unit v cc supply voltage 2 5.5 2 5.5 v v cc = 2 v 1.5 1.5 v ih high-level input voltage v cc = 3 v 2.1 2.1 v v cc = 5.5 v 3.85 3.85 v cc = 2 v 0.5 0.5 v il low-level input voltage v cc = 3 v 0.9 0.9 v v cc = 5.5 v 1.65 1.65 v i input voltage 0 5.5 0 5.5 v v o output voltage 0 v cc 0 v cc v v cc = 2 v ? 50 ? 50 a i oh high-level output current v cc = 3.3 v 0.3 v ? 4 ? 4 ma v cc = 5 v 0.5 v ? 8 ? 8 ma v cc = 2 v 50 50 a i ol low-level output current v cc = 3.3 v 0.3 v 4 4 ma v cc = 5 v 0.5 v 8 8 ma ? t /? v in p ut transition rise or fall rate v cc = 3.3 v 0.3 v 100 100 ns/v ? t /? v input transition rise or fall rate v cc = 5 v 0.5 v 20 20 ns/v t a operating free-air temperature ? 55 125 ? 40 85 c note 4: all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004.
sn54ahc74, sn74ahc74 dual positive-edge-triggered d-type flip-flops with clear and preset scls255j ? december 1995 ? revised july 2003 4 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc t a = 25 c sn54ahc74 sn74ahc74 unit parameter test conditions v cc min typ max min max min max unit 2 v 1.9 2 1.9 1.9 i oh = ? 50 a 3 v 2.9 3 2.9 2.9 v oh 4.5 v 4.4 4.5 4.4 4.4 v i oh = ? 4 ma 3 v 2.58 2.48 2.48 i oh = ? 8 ma 4.5 v 3.94 3.8 3.8 2 v 0.1 0.1 0.1 i ol = 50 a 3 v 0.1 0.1 0.1 v ol 4.5 v 0.1 0.1 0.1 v i ol = 4 ma 3 v 0.36 0.5 0.44 i ol = 8 ma 4.5 v 0.36 0.5 0.44 i i v i = 5.5 v or gnd 0 v to 5.5 v 0.1 1* 1 a i cc v i = v cc or gnd, i o = 0 5.5 v 2 20 20 a c i v i = v cc or gnd 5 v 2 10 10 pf * on products compliant to mil-prf-38535, this parameter is not production tested at v cc = 0 v. timing requirements over recommended operating free-air temperature range, v cc = 3.3 v 0.3 v (unless otherwise noted) (see figure 1) t a = 25 c sn54ahc74 sn74ahc74 unit min max min max min max unit t pulse duration pre or clr low 6 7 7 ns t w pulse duration clk 6 7 7 ns t setup time before clk 0.5 0.5 0.5 ns timing requirements over recommended operating free-air temperature range, v cc = 5 v 0.5 v (unless otherwise noted) (see figure 1) t a = 25 c sn54ahc74 sn74ahc74 unit min max min max min max unit t pulse duration pre or clr low 5 5 5 ns t w pulse duration clk 5 5 5 ns t setup time before clk 0.5 0.5 0.5 ns
sn54ahc74, sn74ahc74 dual positive-edge-triggered d-type flip-flops with clear and preset scls255j ? december 1995 ? revised july 2003 5 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended operating free-air temperature range, v cc = 3.3 v 0.3 v (unless otherwise noted) (see figure 1) parameter from to load t a = 25 c sn54ahc74 sn74ahc74 unit parameter (input) (output) capacitance min typ max min max min max unit f c l = 15 pf 80* 125* 70* 70 mhz f max c l = 50 pf 50 75 45 45 mhz t plh pre or clr qorq c l =15 p f 7.6* 12.3* 1* 14.5* 1 14.5 ns t phl pre or clr q or q c l = 15 pf 7.6* 12.3* 1* 14.5* 1 14.5 ns t plh clk qq c l =15 p f 6.7* 11.9* 1* 14* 1 14 ns t phl clk q or q c l = 15 pf 6.7* 11.9* 1* 14* 1 14 ns t plh pre clr qq c l =50 p f 10.1 15.8 1 18 1 18 ns t phl pre or clr q or q c l = 50 pf 10.1 15.8 1 18 1 18 ns t plh clk qorq c l =50 p f 9.2 15.4 1 17.5 1 17.5 ns t phl clk q or q c l = 50 pf 9.2 15.4 1 17.5 1 17.5 ns * on products compliant to mil-prf-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, v cc = 5 v 0.5 v (unless otherwise noted) (see figure 1) parameter from to load t a = 25 c sn54ahc74 sn74ahc74 unit parameter (input) (output) capacitance min typ max min max min max unit f c l = 15 pf 130* 170* 110* 110 mhz f max c l = 50 pf 90 115 75 75 mhz t plh pre clr qq c l =15 p f 4.8* 7.7* 1* 9* 1 9 ns t phl pre or clr q or q c l = 15 pf 4.8* 7.7* 1* 9* 1 9 ns t plh clk qorq c l =15 p f 4.6* 7.3* 1* 8.5* 1 8.5 ns t phl clk q or q c l = 15 pf 4.6* 7.3* 1* 8.5* 1 8.5 ns t plh pre clr qq c l =50 p f 6.3 9.7 1 11 1 11 ns t phl pre or clr q or q c l = 50 pf 6.3 9.7 1 11 1 11 ns t plh clk qorq c l =50 p f 6.1 9.3 1 10.5 1 10.5 ns t phl clk q or q c l = 50 pf 6.1 9.3 1 10.5 1 10.5 ns * on products compliant to mil-prf-38535, this parameter is not production tested. noise characteristics, v cc = 5 v, c l = 50 pf, t a = 25 c (see note 5 ) parameter sn74ahc74 unit parameter min max unit v ol(p) quiet output, maximum dynamic v ol 0.8 v v ol(v) quiet output, minimum dynamic v ol ? 0.8 v v oh(v) quiet output, minimum dynamic v oh 4.7 v v ih(d) high-level dynamic input voltage 3.5 v v il(d) low-level dynamic input voltage 1.5 v note 5: characteristics are for surface-mount packages only. operating characteristics, v cc = 5 v, t a = 25 c parameter test conditions typ unit c pd power dissipation capacitance no load, f = 1 mhz 32 pf
sn54ahc74, sn74ahc74 dual positive-edge-triggered d-type flip-flops with clear and preset scls255j ? december 1995 ? revised july 2003 6 post office box 655303 ? dallas, texas 75265 parameter measurement information 50% v cc v cc v cc 0 v 0 v t h t su voltage waveforms setup and hold times data input t plh t phl t phl t plh v oh v oh v ol v ol v cc 0 v 50% v cc 50% v cc input out-of-phase output in-phase output timing input 50% v cc voltage waveforms propagation delay times inverting and noninverting outputs output control output waveform 1 s1 at v cc (see note b) output waveform 2 s1 at gnd (see note b) v ol v oh t pzl t pzh t plz t phz v cc 0 v 50% v cc v ol + 0.3 v 50% v cc 0 v v cc voltage waveforms enable and disable times low- and high-level enabling t plh /t phl t plz /t pzl t phz /t pzh open drain open v cc gnd v cc test s1 v cc 0 v 50% v cc t w voltage waveforms pulse duration input notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 1 mhz, z o = 50 ? , t r 3 ns, t f 3 ns. d. the outputs are measured one at a time with one input transition per measurement. e. all parameters and waveforms are not applicable to all devices. from output under test c l (see note a) load circuit for 3-state and open-drain outputs s1 v cc r l = 1 k ? gnd from output under test c l (see note a) test point load circuit for totem-pole outputs open 50% v cc 50% v cc 50% v cc 50% v cc 50% v cc 50% v cc 50% v cc 50% v cc v oh ? 0.3 v figure 1. load circuit and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 5962-9686001q2a active lccc fk 20 1 tbd call ti level-nc-nc-nc 5962-9686001qca active cdip j 14 1 tbd call ti level-nc-nc-nc 5962-9686001qda active cfp w 14 1 tbd call ti level-nc-nc-nc sn74ahc74d active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74dbg4 active ssop db 14 80 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74dble obsolete ssop db 14 tbd call ti call ti sn74ahc74dbr active ssop db 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74dbre4 active ssop db 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74dbrg4 active ssop db 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74de4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74dgvr active tvsop dgv 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74dgvre4 active tvsop dgv 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74dr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74dre4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74n active pdip n 14 25 pb-free (rohs) cu nipdau level-nc-nc-nc sn74ahc74ne4 active pdip n 14 25 pb-free (rohs) cu nipdau level-nc-nc-nc sn74ahc74nsr active so ns 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74nsre4 active so ns 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74pw active tssop pw 14 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74pwe4 active tssop pw 14 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74pwg4 active tssop pw 14 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74pwle obsolete tssop pw 14 tbd call ti call ti sn74ahc74pwr active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74pwre4 active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74pwrg4 active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74ahc74rgyr active qfn rgy 14 1000 green (rohs & no sb/br) cu nipdau level-2-260c-1year snj54ahc74fk active lccc fk 20 1 tbd call ti level-nc-nc-nc package option addendum www.ti.com 26-sep-2005 addendum-page 1
orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) snj54ahc74j active cdip j 14 1 tbd call ti level-nc-nc-nc snj54ahc74w active cfp w 14 1 tbd call ti level-nc-nc-nc (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs) or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 26-sep-2005 addendum-page 2

mechanical data mlcc006b october 1996 post office box 655303 ? dallas, texas 75265 fk (s-cqcc-n**) leadless ceramic chip carrier 4040140 / d 10/96 28 terminal shown b 0.358 (9,09) max (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) a no. of min max 0.358 0.660 0.761 0.458 0.342 (8,69) min (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32) (18,78) ** 20 28 52 44 68 84 0.020 (0,51) terminals 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 12 13 14 15 16 18 17 11 10 8 9 7 5 4 3 2 0.020 (0,51) 0.010 (0,25) 6 1 28 26 27 19 21 b sq a sq 22 23 24 25 20 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a metal lid. d. the terminals are gold plated. e. falls within jedec ms-004

mechanical data mpds006c february 1996 revised august 2000 post office box 655303 ? dallas, texas 75265 dgv (r-pdso-g**) plastic small-outline 24 pins shown 14 3,70 3,50 4,90 5,10 20 dim pins ** 4073251/e 08/00 1,20 max seating plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 112 24 13 4,30 4,50 0,16 nom gage plane a 7,90 7,70 38 24 16 4,90 5,10 3,70 3,50 a max a min 6,60 6,20 11,20 11,40 56 9,60 9,80 48 0,08 m 0,07 0,40 0 8 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. d. falls within jedec: 24/48 pins mo-153 14/16/20/56 pins mo-194

mechanical data msso002e ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 db (r-pdso-g**) plastic small-outline 4040065 /e 12/01 28 pins shown gage plane 8,20 7,40 0,55 0,95 0,25 38 12,90 12,30 28 10,50 24 8,50 seating plane 9,90 7,90 30 10,50 9,90 0,38 5,60 5,00 15 0,22 14 a 28 1 20 16 6,50 6,50 14 0,05 min 5,90 5,90 dim a max a min pins ** 2,00 max 6,90 7,50 0,65 m 0,15 0 ? 8 0,10 0,09 0,25 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-150
mechanical data mtss001c january 1995 revised february 1999 post office box 655303 ? dallas, texas 75265 pw (r-pdso-g**) plastic small-outline package 14 pins shown 0,65 m 0,10 0,10 0,25 0,50 0,75 0,15 nom gage plane 28 9,80 9,60 24 7,90 7,70 20 16 6,60 6,40 4040064/f 01/97 0,30 6,60 6,20 8 0,19 4,30 4,50 7 0,15 14 a 1 1,20 max 14 5,10 4,90 8 3,10 2,90 a max a min dim pins ** 0,05 4,90 5,10 seating plane 0 8 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-153
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security telephony www.ti.com/telephony video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ? 2005, texas instruments incorporated

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